Pin share or I call it pinmux, it is a common feature of most MCU chips. Normally a pin we can use it as GPIO or some special functions.
In picture, the orange number is each pins GPIO number. And in the color block, there is its special function.
Here is a table from vocore.io/v2.html, for example, the pin 29 on the chip has three functions, one is used as GPIO, one is system reference clock, final one is SDcard CLK.
10/100 PHY Port #1 RXN, GPIO17, UART2 Lite TXD, SPI Slave MOSI
4.7K pull down to GND
42
PWM1
10/100 PHY Port #1 RXP, GPIO16, UART2 Lite RXD, SPI Slave MISO
45
P2RP
10/100 PHY Port #2 RXP, GPIO18, PWM Channel
46
P2RN
10/100 PHY Port #2 RXN, GPIO19, PWM Channel
47
P2TP
10/100 PHY Port #2 TXP, GPIO20, PWM Channel
48
P2TN
10/100 PHY Port #2 TXN, GPIO21, PWM Channel
49
SD WP
GPIO22, 10/100 PHY Port #3 TXP, SDXC WP
50
SD CD
GPIO23, 10/100 PHY Port #3 TXN, SDXC CD
Top
Name
Mux
Note
–
GND
Groud
28
SPI CS0
SPI Master Chip Select 0
4.7K pull up to 3.3V
25
SPI CLK
SPI Master Clock
4.7K pull up to 3.3V
26
SPI MISO
SPI Master In Slave Out
27
SPI MOSI
SPI Master Out Slave In
4.7K pull down to GND
24
SPI CS1
SPI Master Chip Select 1
4.7K pull down to GND
21
I2C SD
GPIO5, I2C Data, SDXC D2*
4.7K pull up to 3.3V
20
I2C CLK
GPIO4, I2C Clock, SDXC D3*
4.7K pull up to 3.3V
19
I2S CLK
GPIO3, I2S Bit Clock, SDXC CMD*
18
I2S WS
GPIO2, I2S L/R Clock, SDXC D0*
16
I2S SDI
GPIO0, I2S Data In, SDXC D1*
17
I2S SDO
GPIO1, I2S Data Out
4.7K pull down to GND
Right
Name
Mux
Note
–
GND
Ground
148
RXD1
GPIO12, UART1 Lite RXD
147
TXD1
GPIO13, UART1 Lite TXD
pull up to 3.3V, GPIO/JTAG mode pin
141
GPIO41
GPIO41, JTAG TMS
JTAG needs 10K pull up, R9 -> R6
140
GPIO40
GPIO40, JTAG Clock
JTAG needs 10K pull up, R9 -> R6
139
GPIO39
GPIO39, JTAG Reset
JTAG needs 10K pull up, R9 -> R6
143
GPIO43
GPIO43, JTAG TDO
JTAG needs 10K pull up, R9 -> R6
142
GPIO42
GPIO42, JTAG TDI
JTAG needs 10K pull up, R9 -> R6
138
RST
Reset, touch GND to reset
137
GPIO38
GPIO38
136
GPIO37
GPIO37
–
+3.3VO
+3.3V output
max output current 100mA
–
GND
Ground
–
GND
Ground
–
+1.8VO
+1.8V output
max output current 100mA
Bottom
Name
Mux
Note
–
GND
Ground
51
SD D1
GPIO24, 10/100 PHY Port #3 RXP, SDXC D1
52
SD D0
GPIO25, 10/100 PHY Port #3 RXN, SDXC D0
54
SD CLK
GPIO26, 10/100 PHY Port #4 RXP, SDXC CLK
55
SD CMD
GPIO27, 10/100 PHY Port #4 RXN, SDXC CMD
56
SD D3
GPIO28, 10/100 PHY Port #4 TXP, SDXC D3
57
SD D2
GPIO29, 10/100 PHY Port #4 TXN, SDXC D2
–
+3.3VO
+3.3V output
max output current 100mA
61
USB DP
USB2.0 Data+
62
USB DM
USB2.0 Data-
–
+5.0VI
+5.0V input
min input current 500mA
–
+5.0VI
+5.0V input
min input current 500mA
–
GND
Ground
–
GND
Ground
Middle
Name
Mux
Note
133
PCI CKP
PCI Express External Reference Clock Output+
132
PCI CKN
PCI Express External Reference Clock Output-
130
PCI RXN
PCI Express Differential Receiver RX-
129
PCI RXP
PCI Express Differential Receiver RX+
–
GND
Ground
127
PCI TXP
PCI Express Differential Transmit TX+
126
PCI TXN
PCI Express Differential Transmit TX-
135
PCI RST
PCI Express Device Reset
On VoCore2 Ultimate, ES8388 do not need external clock because we can use VoCore2 system reference clock as its source, in most situation, that will save cost of the BOM.
Set the Pin Function
now, question come, how do we setup every pins function? Sometimes you may want use it as GPIO but sometimes we need to use as clock.
Actually it is same as other MCU(like STM32 and ATMEGA–Arduino) , we have register for every function.
Use this REFCLK pin as example, we can find on MT7628AN datasheet page 117, 2.2 System Control Section, 0x10000060 is that control register.
Its register is 1:0 two bits. (note: on this datasheet, its name is GPIO mode)
We can write 10b to this register, then it will be REFCLK mode.
and after it into REFCLK mode, we can change its frequency, at page 110, 0x1000002c register, bit 11:9 REFCLK0_RATE
And you can use same way to change other pins function 🙂
Also I have a simple tool to do this, please download at vocore.io/v2.html, Directly write to memory/register Section.
mjpeg-streamer is an easy way, but it only able to push mjpeg data, it is a waste because VoCam264 already has h264 stream inside.
So I plan to push h264 data to a RTMP server like nginx-rtmp(-module).
The first way in my mind is to use ffmpeg directly.
Just one command, and it should work: ffmpeg -re -f v4l2 -i /dev/video1 -c:v copy -f flv rtmp://192.168.0.xxx/live
My server is setup at rtmp://192.168.0.xxx/live
Note1: old version ffmpeg do not work well, I am using version 4.2.2. Currently openwrt package has ffmpeg, but it is 3.4.2, we must modify the Makefile and compile again to use latest version. I ave upload Makefile to github.com/vonger/vocore2, in utils folder.
Trying to set codec:h264 pix_fmt:none
parser not found for codec h264, packets or times may be invalid.
Note2: default Makefile will show error about parser, we need to enable h264 parser.
Then ffmpeg is able to push h264 video from camera to server.
Unfortunately, the speed is very slow and video is laggy…Maybe there is something wrong, because it works well on a Linux PC..
GD32F1x0_Firmware_Library_v3.1.0 this library is from GigaDevice. Download here: http://vonger.cn/misc/vocore2/GD32F1x0_Firmware_Library_v3.1.0.rar; For toolchain, please check http://vonger.cn/?p=14891, I have a link there.
The library is for Keil originally. I make some patches, all changes are in project/core folder.
startup_gd32f1x0.s this mainly change the interrupt vector, we need the interrupt callback function name same.
gd32f150g8.ld this is used to create bin or hex file which is used to load into flash.
For VoCore2 Ultimate, we use internal 8M clock, so comment the line 46 #define __SYSTEM_CLOCK_72M_PLL_HXTAL and uncomment line 47 #define __SYSTEM_CLOCK_72M_PLL_IRC8M_DIV2 in GD32F1x0_Firmware_Library_v3.1.0/Firmware/CMSIS/GD/GD32F1x0/Source/system_gd32f1x0.c
Now we are ready to make. in adc1 folder, call make, it will create adc1.hex.
Connect BOOT pin on the dock to 3.3V pin on VoCore2, then power on them from microUSB.
Once VoCore2 ready, run gd32up to load adc1.hex. After upload done, power off it and disconnect BOOT from 3.3V (We do not export its RST pin, so have to power off to reset).
After you connect it back to power, the GD32F150 will in ADC mode, UART2 on VoCore2 is not for USB2TTL anymore, it will output ADC value to VoCore’s UART2. We can use minicom to view it at VoCore2 console, 115200, 8n1.
This is a tutorial for using C/C++ compile application in VoCore2.
1. Prepare a USB disk or SD card, at least 256MB, because GCC takes around 110MB. USB disk or SD card must be EXT4 format.
For macOS or Linux, call mkfs.ext4 /dev/disk2 to do this. /dev/disk2 is the USB disk name on my computer, please change to the name on your computer. Or another way, directly format it in VoCore2, need to install e2fsprogs.
Or another way, directly manually mount /dev/sda or /dev/mmcblk0 to /overlay folder by command mount /dev/sda /overlay.
4. Now we can install GCC
This part is easy, just call
opkg update
opkg install gcc
It will install gcc, ar, binutils,libbfd, objdump, libopcodes packages from openwrt server.
Then we can compile C source code, try gcc yourcode.c -o out. Speed is not very fast, but works.
NOTE: compile better in /tmp folder(it is memory virtual disk) or in /overlay(it is the SD card we inserted). Rest path will store in NOR flash who has very limited write times and very little free space.
It works very smooth, just like smart phone. And color is very well too. 🙂 I really like this small device, I guess it should be the lowest cost WVGA(800×480) UI solution or HMI solution. 1K units should be less than 10USD, so with VoCore2, the full solution cost can be less than 20USD.
Now I am busy on doing the final debug and fix. Hopefully in next month, I can get first batch of the production and put on vocore.io.
Because currently I am updating the fully screen every frame, so its FPS is pretty low, only 30fps, but I find a way to update the screen partially, so once I finish the next patch, the screen will reach 60fps, can be run on VoCore, Android smart phone and Windows computer as an extend screen.
Qt recently public MCU1.0, running on a very expansive platform over 30USD with low speed CPU and only 1MB~4MB memory. I guess it will be perfect with VoCore and this screen. I will be the first guy port it. :p
i2c-tools is not that easy to use in some situation. Recently I need to make sure my room is wet enough to kill virus, so I develop a simple tool based on SHT20 — a temperature and humidity sensor, but I find I can not use i2c-tools to test SHT20 I2C bus, it missed some key features.
I have to spend couple of hours write another one.
usage: i2ctest [dev path] [address] [r/w] [length/data]
example:
show device on i2c-0:
i2ctest /dev/i2c-0
read 3 byte from i2c-0, address 0x40:
i2ctest /dev/i2c-0 0x40 r 3
write 2 byte(0xe2 0x88) to i2c-0, address 0x21:
i2ctest /dev/i2c-0 0x21 w '0xe2 0x88'
Recently The well known Corona Virus from Wuhan is spreading very fast…Our China government extended Chinese New Year holiday to Feb.9 in order to slow down the virus spreading. From Jan.20 to Feb.10, we can not ship out any package.
Sorry about the delay, hope the disaster will pass soon…
<GPIO0 5> <GPIO0 10> is not really used as GPIO, just a place holder for CS0, CS1. <GPIO1 5> is CS2, it is GPIO37(32+5), <GPIO1 6> is CS3, it is GPIO38(32+6). Once we have this, we can connect SPI device CS pins to it, I use spidev_test check if it is working.
Note: spi-mt7621 max allowed data length is 16byte, so do not send data exceeds this number, or it will oops. Use ‘-p’ parameter to avoid spidev_test default send 38 bytes.
This blog will include two parts, first, make one VoCore2(name it host) into a JTAG compatible device, like JLINK; second, enable another one VoCore2(name it client) JTAG port, so we can use host JTAG connect to it and debug.
OK, let’s start how to make it.
JTAG Host Device
OpenOCD only requires some GPIOs to make the JTAG work in TAP mode, so let’s define some GPIOs as JTAG pins.
JTAG has five pins, TMS, TCLK, JRST, TDO, TDI. SRST is for system reset, openOCD will use this pin to reset client VoCore.
2. Add pull up resistor to all of the JTAG pins.
3. Now install openocd to VoCore2. I have uploaded openocd package Makefile to github.com/vonger/vocore2, in utils/openocd folder, or you can directly use the openocd Makefile in openwrt official feeds named “package”.
It will require some depends: hidapi_0.8.0-rc1-2_mipsel_24kc.ipk, libftdi1_1.4-6_mipsel_24kc.ipk, libusb-1.0_1.0.22-1_mipsel_24kc.ipk, libusb-compat_0.1.5-1_mipsel_24kc.ipk
Note: actually we do not need hidapi, libusb, but install it is the most easy way, so we do not have to modify its Makefile.
4. Download openOCD configure file for VoCore2. I am using configure from https://github.com/Neutree/MT7688-OpenOCD, jlink-gpio.cfg. Because my GPIO setting is different, so need to modify its pin define.
Note: For OpenWrt 21.02, gpio start from 416, not 0. It is weird but true, we need to use gpio 456(416+40) to export gpio 40. It should be sysfsgpio_jtag_nums 456 457 458 459.
Now, this host JTAG VoCore2 prepare is done. Actually it is ready to debug any JTAG compatible device, just need different cfg files.
If you want to access it from remote, must add bindto command, or openocd will bind to localhost only, can not access from outside. Sad, I spend two hours to solve this problem, I thought it was firewall issue. 🙁
JTAG Client Device
We need to change default bootstrap from GPIO to JTAG. One way is directly modify register 0x10000010 SYSCFG0, but it will back to GPIO mode once you reboot. Another way is to modify bootstrap resistor, we have to use this way.
2. connect host JTAG cables to it. All of the six cables are necessary.
3. connect client VoCore2 and host VoCore2 GND together, to avoid data transfer issue.
Ready to RUN!
Now we have prepared the JTAG host device and a test client device. We can power them on with 5V.
In host VoCore2, run command: openocd -f jlink-gpio.cfg &, it will create a server process, in jlink-gpio.cfg, we define telnet port is 4444 and gdb port is 3333, then we can use telnet connect to VoCore2 4444 port(remember to open the port at firewall).
Here is my log:
root@OpenWrt:~# openocd -f jlink_gpio.cfg Open On-Chip Debugger 0.10.0 Licensed under GNU GPL v2 For bug reports, read http://openocd.org/doc/doxygen/bugs.html SysfsGPIO nums: tck = 40, tms = 41, tdi = 42, tdo = 43 SysfsGPIO num: srst = 39 SysfsGPIO num: trst = 38 adapter_nsrst_delay: 100 Info : auto-selecting first available session transport "jtag". To override use 'transport select <transport>'. jtag_ntrst_delay: 100 trst_and_srst separate srst_gates_jtag trst_push_pull srst_open_drain connect_deassert_srst 0 Info : SysfsGPIO JTAG/SWD bitbang driver Info : JTAG only mode enabled (specify swclk and swdio gpio to add SWD mode) Info : This adapter doesn't support configurable speed Info : JTAG tap: mt7688.cpu tap/device found: 0x1762824f (mfg: 0x127 (MIPS Technologies), part: 0x7628, ver: 0x1)
And telnet side (I am new to openOCD, I guess this log means it already works somehow)